Salehuddin, F.

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Salehuddin, F.

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12 2010 - 2019

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Results 1-12 of 12 (Search time: 0.0 seconds).

	Issue Date	Title	Author(s)
1	2016	Variability analysis of process parameters on subthreshold swing in vertical DG-MOSFET device	Kaharudin, K.E. ; Salehuddin, F. ; Hamidon, A.H. ; Zain, A. ; Abd Aziz, M.N.I. ; Ahmad, I.
2	2015	Taguchi modeling of process parameters in vdg-mosfet device for higher ION/IOFF ratio	Kaharudin, K.E. ; Salehuddin, F. ; Hamidon, A.H. ; Aziz, M.N.I.A. ; Ahmad, I.
3	2014	Statistical process modelling for 32nm high-K/metal gate PMOS device	Maheran, A.H.A. ; Noor Faizah, Z.A. ; Menon, P.S. ; Ahmad, I. ; Apte, P.R. ; Kalaivani, T. ; Salehuddin, F.
4	2012	Scaling down of the 32 nm to 22 nm gate length NMOS transistor	Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Elgomati, H.A. ; Majlis, B.Y. ; Salehuddin, F.
5	2016	Process parameter optimisation for minimum leakage current in a 22nm p-type MOSFET using Taguchi method	Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Salehuddin, F. ; Mohd Zain, A.S.
6	2016	Optimization of process parameter variations on threshold voltage in Ultrathin Pillar Vertical Double Gate MOSFET Device	Kaharudin, K.E. ; Hamidon, A.H. ; Salehuddin, F. ; Ifwat Abd Aziz, M.N. ; Ahmad, I.
7	2011	Optimization of HALO structure effects in 45nm p-type MOSFETs device using taguchi method	Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. ; Elgomati, H.A. ; Majlis, B.Y. ; Apte, P.R.
8	2016	Electrical characterization of different high-k dielectrics with tungsten silicide in vertical double gate nmos structure	Kaharudin, K.E. ; Salehuddin, F. ; Soin, N. ; Zain, A.S.M. ; Aziz, M.N.I.A. ; Ahmad, I.
9	2012	Design and optimization of 22nm NMOS transistor	Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Elgomati, H.A. ; Majlis, B.Y. ; Salehuddin, F.
10	2013	Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor	Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Elgomati, H.A. ; Salehuddin, F.
11	2016	Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS	Kaharudin, K.E. ; Salehuddin, F. ; Zain, A.S.M. ; Aziz, M.N.I.A. ; Ahmad, I.
12	2014	Analysis of threshold voltage variance in 45nm n-channel device using L27 orthogonal array method	Salehuddin, F. ; Mohd Zain, A.S. ; Idris, N.M. ; Mat Yamin, A.K. ; Abdul Hamid, A.M. ; Ahmad, I. ; Menon, P.S.