Menon, P.S.
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Results 1-16 of 16 (Search time: 0.0 seconds).
| Issue Date | Title | Author(s) | |
|---|---|---|---|
| 1 | 2013 | Threshold voltage optimization in a 22nm High-k/Salicide PMOS device | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Yusoff, Z. | 
| 2 | 2014 | Statistical process modelling for 32nm high-K/metal gate PMOS device | Maheran, A.H.A. ; Noor Faizah, Z.A. ; Menon, P.S. ; Ahmad, I. ; Apte, P.R. ; Kalaivani, T. ; Salehuddin, F. | 
| 3 | 2015 | Statistical optimization of process parameters for threshold voltage in 22 nm p-Type MOSFET using Taguchi method | Maheran, A.H.A. ; Menon, P.S. ; Shaari, S. ; Ahmad, I. ; Faizah, Z.A.N. | 
| 4 | 2012 | Scaling down of the 32 nm to 22 nm gate length NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Elgomati, H.A. ; Majlis, B.Y. ; Salehuddin, F. | 
| 5 | 2016 | Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling | Noor Faizah, Z.A. ; Ahmad, I. ; Ker, P.J. ; Siti Munirah, Y. ; Mohd Firdaus, R. ; Md Fazle, E. ; Menon, P.S. | 
| 6 | 2016 | Process Parameters Optimization of 14nm MOSFET Using 2-D Analytical Modelling | Noor Faizah, Z.A. ; Ahmad, I. ; Ker, P.J. ; Siti Munirah, Y. ; Mohd Firdaus, R. ; Md Fazle, E. ; Menon, P.S. | 
| 7 | 2016 | Process parameter optimisation for minimum leakage current in a 22nm p-type MOSFET using Taguchi method | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Salehuddin, F. ; Mohd Zain, A.S. | 
| 8 | 2014 | Optimisation of process parameters for lower leakage current in 22 nm n-type MOSFET device using Taguchi method | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. | 
| 9 | 2012 | High performance of a SOI-based lateral PIN photodiode using SiGe/Si multilayer quantum well | Menon, P.S. ; Tasirin, S.K. ; Ahmad, I. ; Abdullah, S.F. | 
| 10 | 2014 | Effect of process parameter variability on the threshold voltage of downscaled 22nm PMOS using taguchi method | Maheran, A.H.A. ; Menon, P.S. ; Shaari, S. ; Kalaivani, T. ; Ahmad, I. ; Faizah, Z.A.N. ; Apte, P.R. | 
| 11 | 2014 | Effect of Halo structure variations on the threshold voltage of a 22 nm gate length NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. | 
| 12 | 2015 | Development of process parameters for 22 nm PMOS using 2-D analytical modeling | Maheran, A.H.A. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Faizah, Z.A.N. | 
| 13 | 2012 | Design and optimization of 22nm NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Elgomati, H.A. ; Majlis, B.Y. ; Salehuddin, F. | 
| 14 | 2013 | Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Elgomati, H.A. ; Salehuddin, F. | 
| 15 | 2014 | Application of Taguchi method in designing a 22nm high-k/metal gate NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. | 
| 16 | 2014 | Analysis of threshold voltage variance in 45nm n-channel device using L27 orthogonal array method | Salehuddin, F. ; Mohd Zain, A.S. ; Idris, N.M. ; Mat Yamin, A.K. ; Abdul Hamid, A.M. ; Ahmad, I. ; Menon, P.S. |