Showing results 1 to 17 of 31
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Issue Date | Title | Author(s) |
2014 | Analysis of threshold voltage variance in 45nm n-channel device using L27 orthogonal array method | Salehuddin, F. ; Mohd Zain, A.S. ; Idris, N.M. ; Mat Yamin, A.K. ; Abdul Hamid, A.M. ; Ahmad, I. ; Menon, P.S. |
2010 | Analyze and optimize the silicide thickness in 45nm CMOS technology using Taguchi method | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. |
2011 | Analyze of input process parameter variation on threshold voltage in 45nm n-channel MOSFET | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. ; Elgomati, H.A. ; Majlis, B.Y. |
2011 | Application of Taguchi method in the optimization of process variation for 32nm CMOS technology | Elgomati, H.A. ; Majlis, B.Y. ; Ahmad, I. ; Salehuddin, F. ; Hamid, F.A. ; Zaharim, A. ; Apte, P.R. |
2016 | Application of taguchi method with the interaction test for lower DIBL IN WSix/TiO2 channel vertical double gate NMOS | Kaharudin, K.E. ; Salehuddin, F. ; Zain, A.S.M. ; Aziz, M.N.I.A. ; Ahmad, I. |
2010 | Characterization and optimizations of silicide thickness in 45nm pMOS device | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. |
2011 | Cobalt silicide and titanium silicide effects on nano devices | Elgomati, H.A. ; Majlis, B.Y. ; Salehuddin, F. ; Ahmad, I. ; Zaharim, A. ; Hamid, F.A. |
2017 | Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Salehuddin, F. ; Mohd, A.S. ; Noor, Z.A. ; Elgomati, H.A. |
2013 | Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Elgomati, H.A. ; Salehuddin, F. |
2012 | Design and optimization of 22nm NMOS transistor | Afifah Maheran, A.H. ; Menon, P.S. ; Ahmad, I. ; Shaari, S. ; Elgomati, H.A. ; Majlis, B.Y. ; Salehuddin, F. |
2010 | Effect of process parameter variations on threshold voltage in 45nm NMOS device | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. |
2016 | Electrical characterization of different high-k dielectrics with tungsten silicide in vertical double gate nmos structure | Kaharudin, K.E. ; Salehuddin, F. ; Soin, N. ; Zain, A.S.M. ; Aziz, M.N.I.A. ; Ahmad, I. |
2012 | Impact of different dose and angle in HALO structure for 45nm NMOS device | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. |
2010 | Impact of HALO structure on threshold voltage and leakage current in 45nm NMOS device | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. |
2011 | Influence of HALO and source/drain implantation on threshold voltage in 45nm PMOS device | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. |
2011 | Optimization of HALO structure effects in 45nm p-type MOSFETs device using taguchi method | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. ; Elgomati, H.A. ; Majlis, B.Y. ; Apte, P.R. |
2011 | Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device | Salehuddin, F. ; Ahmad, I. ; Hamid, F.A. ; Zaharim, A. ; Hashim, U. ; Apte, P.R. |